/* * Simple software defined radio lower Medium-Access-Control layer. * * Copyright (C) 2008 Michael Buesch * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ /* Received packets from the PHY look like this: * * [RF_HEADER] [MAC_HEADER] [PAYLOAD] [CHECKSUM] * 3 bytes 3 bytes var. CRC-8 * * For a description of the RF_HEADER, see PHY documentation. * The payload is opaque and has variable size. * The checksum is a CRC-8 over the MAC_HEADER and PAYLOAD. * * The MAC_HEADER consists of the following fields: * [DEST_ADDR] [SRC_ADDR] [SEQ_CTRL] * 1 byte 1 byte 1 byte * * DEST_ADDR is the destination address of the packet. * SRC_ADDR is the source address of the packet. * SEQ_CTRL is the sequence and fragment control. * * Transmitted packets look the same, except the RF_HEADER is * missing, as it's added in the PHY later. */ #include "../mac2phy.h" #include "../common.h" #include "util.h" #include "spi_master.h" #include "debug.h" #include #include struct mac_header { uint8_t da; uint8_t sa; uint8_t seq; } __attribute__((packed)); #define FCS_LEN 1 /* length of the FrameCheckSequence CRC8 */ enum spi_state_id { SPI_STATE_IDLE, SPI_STATE_GET_RXFRAME_CMD, SPI_STATE_GET_RXFRAME, SPI_STATE_WAIT_RXFRAME, SPI_STATE_PUSH_TXFRAME_CMD, SPI_STATE_PUSH_TXFRAME, SPI_STATE_WAIT_TXFRAME, }; struct spi_state { /* The SPI statemachine. SPI_STATE_*** */ uint8_t state; union { /* Buffer for sending the current command. */ uint8_t cur_cmd; /* Buffer for result codes. */ uint8_t result_code; }; }; static struct spi_state spi_state; static bool rxpack_available_in_phy; /* The MAC address of this device. */ static uint8_t mac_address; /* Promiscuous mode enabled. */ static bool promisc; /* Bad-packets promiscuous mode enabled. */ static bool promisc_bad; /* Buffer for a received packet. */ static uint8_t rx_buf[RF_MAX_PACK_SIZE + RF_HEADER_SIZE]; static bool rx_pack_valid; static uint16_t rx_pack_size; /* Buffer for a to-be-transmitted packet. */ static uint8_t tx_buf[RF_MAX_PACK_SIZE]; static bool tx_pack_valid; static uint16_t tx_pack_size; static inline uint8_t crc8(uint8_t crc, uint8_t data) { /* Polynomial: x^8 + x^7 + x^6 + x^4 + x^2 + 1 */ static const prog_uint8_t t[] = { 0x00, 0xF7, 0xB9, 0x4E, 0x25, 0xD2, 0x9C, 0x6B, 0x4A, 0xBD, 0xF3, 0x04, 0x6F, 0x98, 0xD6, 0x21, 0x94, 0x63, 0x2D, 0xDA, 0xB1, 0x46, 0x08, 0xFF, 0xDE, 0x29, 0x67, 0x90, 0xFB, 0x0C, 0x42, 0xB5, 0x7F, 0x88, 0xC6, 0x31, 0x5A, 0xAD, 0xE3, 0x14, 0x35, 0xC2, 0x8C, 0x7B, 0x10, 0xE7, 0xA9, 0x5E, 0xEB, 0x1C, 0x52, 0xA5, 0xCE, 0x39, 0x77, 0x80, 0xA1, 0x56, 0x18, 0xEF, 0x84, 0x73, 0x3D, 0xCA, 0xFE, 0x09, 0x47, 0xB0, 0xDB, 0x2C, 0x62, 0x95, 0xB4, 0x43, 0x0D, 0xFA, 0x91, 0x66, 0x28, 0xDF, 0x6A, 0x9D, 0xD3, 0x24, 0x4F, 0xB8, 0xF6, 0x01, 0x20, 0xD7, 0x99, 0x6E, 0x05, 0xF2, 0xBC, 0x4B, 0x81, 0x76, 0x38, 0xCF, 0xA4, 0x53, 0x1D, 0xEA, 0xCB, 0x3C, 0x72, 0x85, 0xEE, 0x19, 0x57, 0xA0, 0x15, 0xE2, 0xAC, 0x5B, 0x30, 0xC7, 0x89, 0x7E, 0x5F, 0xA8, 0xE6, 0x11, 0x7A, 0x8D, 0xC3, 0x34, 0xAB, 0x5C, 0x12, 0xE5, 0x8E, 0x79, 0x37, 0xC0, 0xE1, 0x16, 0x58, 0xAF, 0xC4, 0x33, 0x7D, 0x8A, 0x3F, 0xC8, 0x86, 0x71, 0x1A, 0xED, 0xA3, 0x54, 0x75, 0x82, 0xCC, 0x3B, 0x50, 0xA7, 0xE9, 0x1E, 0xD4, 0x23, 0x6D, 0x9A, 0xF1, 0x06, 0x48, 0xBF, 0x9E, 0x69, 0x27, 0xD0, 0xBB, 0x4C, 0x02, 0xF5, 0x40, 0xB7, 0xF9, 0x0E, 0x65, 0x92, 0xDC, 0x2B, 0x0A, 0xFD, 0xB3, 0x44, 0x2F, 0xD8, 0x96, 0x61, 0x55, 0xA2, 0xEC, 0x1B, 0x70, 0x87, 0xC9, 0x3E, 0x1F, 0xE8, 0xA6, 0x51, 0x3A, 0xCD, 0x83, 0x74, 0xC1, 0x36, 0x78, 0x8F, 0xE4, 0x13, 0x5D, 0xAA, 0x8B, 0x7C, 0x32, 0xC5, 0xAE, 0x59, 0x17, 0xE0, 0x2A, 0xDD, 0x93, 0x64, 0x0F, 0xF8, 0xB6, 0x41, 0x60, 0x97, 0xD9, 0x2E, 0x45, 0xB2, 0xFC, 0x0B, 0xBE, 0x49, 0x07, 0xF0, 0x9B, 0x6C, 0x22, 0xD5, 0xF4, 0x03, 0x4D, 0xBA, 0xD1, 0x26, 0x68, 0x9F, }; return pgm_read_byte(&(t[crc ^ data])); } static inline uint8_t crc8_buffer(const void *_buf, uint16_t size) { const uint8_t *buf = _buf; uint16_t i; uint8_t crc = 0xFF; for (i = 0; i < size; i++) crc = crc8(crc, buf[i]); crc ^= 0xFF; return crc; } /* RX-packet available notification interrupt from the PHY. */ ISR(INT0_vect) { rxpack_available_in_phy = 1; } /* Completion callback from SPI-master code. */ void spi_master_xfer_complete(uint16_t size) { switch (spi_state.state) { case SPI_STATE_GET_RXFRAME_CMD: spi_master_fetch(&spi_state.result_code, sizeof(spi_state.result_code)); spi_state.state = SPI_STATE_GET_RXFRAME; break; case SPI_STATE_GET_RXFRAME: if (size != sizeof(spi_state.result_code)) return; if (spi_state.result_code != SPI_ERR_NONE) return; spi_master_fetch(rx_buf, sizeof(rx_buf)); spi_state.state = SPI_STATE_WAIT_RXFRAME; break; case SPI_STATE_WAIT_RXFRAME: spi_state.state = SPI_STATE_IDLE; if (size && (size < sizeof(rx_buf))) { rx_pack_size = size; mb(); rx_pack_valid = 1; } break; case SPI_STATE_PUSH_TXFRAME_CMD: spi_master_fetch(&spi_state.result_code, sizeof(spi_state.result_code)); spi_state.state = SPI_STATE_PUSH_TXFRAME; break; case SPI_STATE_PUSH_TXFRAME: if (size != sizeof(spi_state.result_code)) return; if (spi_state.result_code == SPI_ERR_BUSY) { /* Retry */ spi_state.cur_cmd = SPI_CMD_TXFRAME; spi_master_xmit(&spi_state.cur_cmd, sizeof(spi_state.cur_cmd)); spi_state.state = SPI_STATE_PUSH_TXFRAME_CMD; return; } if (spi_state.result_code != SPI_ERR_NONE) return; spi_master_xmit(tx_buf, tx_pack_size); spi_state.state = SPI_STATE_WAIT_TXFRAME; break; case SPI_STATE_WAIT_TXFRAME: spi_state.state = SPI_STATE_IDLE; mb(); tx_pack_valid = 0; break; } } static void phy_interface_init(void) { /* The PHY notifies us via INT0 if an received packet * is available. The IRQ is triggered by rising edge. */ MCUCR |= (1 << ISC00) | (1 << ISC01); GICR |= (1 << INT0); /* Enable INT0 */ GIFR |= (1 << INTF0); /* Clear IRQ */ spi_state.state = SPI_STATE_IDLE; spi_master_init(); } /* There's another received packet available in the PHY. * Trigger the transfer of the packet to the MAC. */ static int8_t fetch_rxpack_from_phy(void) { if (spi_state.state != SPI_STATE_IDLE) return -1; /* SPI is already doing something. */ if (rx_pack_valid) return -1; /* Buffer is still filled. */ spi_state.cur_cmd = SPI_CMD_RXFRAME; spi_master_xmit(&spi_state.cur_cmd, sizeof(spi_state.cur_cmd)); spi_state.state = SPI_STATE_GET_RXFRAME_CMD; return 0; } static int8_t checksum_received_packet(void) { uint8_t expected_crc, calculated_crc; if (promisc_bad) return 0; calculated_crc = crc8_buffer(rx_buf + RF_HEADER_SIZE, rx_pack_size - FCS_LEN - RF_HEADER_SIZE); expected_crc = rx_buf[rx_pack_size - 1]; if (calculated_crc != expected_crc) return -1; return 0; } static int8_t destination_filter(void) { const struct mac_header *hdr = (struct mac_header *)(rx_buf + RF_HEADER_SIZE); if (promisc) return 0; if (hdr->da != mac_address) return -1; return 0; } /* There's a fresh RX-packet in the MAC RX buffer. * Handle it and push it to the host. */ static void handle_received_packet(void) { int8_t err; if (rx_pack_size < RF_HEADER_SIZE + sizeof(struct mac_header) + FCS_LEN) goto drop; err = checksum_received_packet(); if (err) goto drop; err = destination_filter(); if (err) goto drop; //TODO debug_flip(); goto drop; return; drop: mb(); rx_pack_valid = 0; mb(); } int main(void) { int8_t err; cli(); debug_initialize(); phy_interface_init(); sei(); while (1) { /* Run at least 1uS with interrupts enabled. */ udelay(1); cli(); if (rxpack_available_in_phy) { err = fetch_rxpack_from_phy(); if (!err) rxpack_available_in_phy = 0; } sei(); mb(); if (rx_pack_valid) handle_received_packet(); } }